High-speed packet switches achieve increasingly higher throughputs and better jitter management at the expense, however, of substantial increase in utilized power. The latter has become an acute problem, as higher power results in unacceptable thermal stress of switching chips/systems and requires extensive cooling apparatus. Low power circuit design is one way to partially address the problem. Instead, in this talk we focus on operational and algorithmic methods for power managing switches.

We present some recent results for power-aware packet scheduling in packet switches. We focus on the power vs. latency tradeoff and discuss how to systematically manage power/speed modes against acceptable packet delays and traffic bursts. The power management algorithms are also aligned with the need to achieve maximal throughput when the traffic load becomes excessive.

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Nick Bambos is Professor at Stanford University, having a joint appointment in the dept. of Electrical Engineering and the dept. of Management Science. He received his Ph.D. in electrical engineering from U.C. Berkeley in 1989. He has received various awards, including the NSF young investigator award, the Cisco Systems Chair at Stanford, the IBM faculty award, etc. His current research interests include high-performance engineering of computer systems/networks; data-center computing; wireless computing/networking; media streaming over wireless; low power design, etc.